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Guide to RISC Processors [electronic resource] : for Programmers and Engineers / by Sivarama P. Dandamudi.

By: Dandamudi, Sivarama P [author.].
Contributor(s): SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: New York, NY : Springer New York, 2005Description: XVI, 388 p. 80 illus. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9780387274461.Subject(s): Computer science | Microprogramming | Computer organization | Microprocessors | Software engineering | Computer programming | Computer Science | Processor Architectures | Control Structures and Microprogramming | Software Engineering/Programming and Operating Systems | Computer Systems Organization and Communication Networks | Programming TechniquesAdditional physical formats: Printed edition:: No titleDDC classification: 004.1 Online resources: Click here to access online
Contents:
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations.
In: Springer eBooksSummary: Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features: Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience Presents material in a manner suitable for flexible self-studyAssembly language programs permit reader executables using the SPIM simulatorIntegrates core concepts to processor designs and their implementationsSupplies extensive and complete programming examples and figuresContains chapter-by-chapter overviews and summaries Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics Processor design issues Evolution of CISC and RISC processors MIPS, SPARC, PowerPC, Itanium, and ARM architectures MIPS assembly language SPIM simulator and debugger Conditional execution Floating-point and logical and shift operations Number systems Computer Architecture/Programming Beginning/Intermediate Level.
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Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operations -- Recursion -- Floating-Point Operations.

Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features: Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience Presents material in a manner suitable for flexible self-studyAssembly language programs permit reader executables using the SPIM simulatorIntegrates core concepts to processor designs and their implementationsSupplies extensive and complete programming examples and figuresContains chapter-by-chapter overviews and summaries Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics Processor design issues Evolution of CISC and RISC processors MIPS, SPARC, PowerPC, Itanium, and ARM architectures MIPS assembly language SPIM simulator and debugger Conditional execution Floating-point and logical and shift operations Number systems Computer Architecture/Programming Beginning/Intermediate Level.

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